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110年 - 110 國立臺灣大學_碩士班招生考試_部分系所:計算機結構與作業系統(B)#102077
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題組內容
5. (10 pts) Please read the code segment and answer the five sub-questions.
(d) (2 pts) When SIGINT is sent and caught; from which line will the process be resumed?
相關申論題
(e)(2 pts) When sigaction() on line 17, 19, and 21 are replaced by signal(), what's the signal mask after resumed by catching SIGINT? (A) SIGUSR1 and SIGUSR2, (B) SIGUSR1, (C) SIGINT and SIGUSR2, and (D) Empty.
#428891
(a) (5 pts) What is the size (bits) of the tag array?
#428892
(b) (5 pts) Could increasing the cache associativity reduce cache misses running the above codes?
#428893
(c) (5 pts) How many coherence misses could occur in the worst case(c1)? How many of them are false-sharing misses(c2)?
#428894
(d) (5 pts) if the cache line size becomes 32 bytes (the cache size is still 4KiB), how many coherence misses could occur in the worst case (d1)? How many of them are false-sharing misses(d2)?
#428895
(a) (10 pts) Which pipeline stage determines the clock cycle time?
#428896
(b)( 5 pts) When the first instruction (tw) is in the MeM stage, which instructions are executing in the ID (b1) and EX (b2) stage? (請填寫instructionnumber不要instruction)
#428897
(c) (5 pts)When the sub instruction (#4) is in the EX state, what value should be set for the control signal ForwardA (c1) and ForwardB (c2), respectively?
#428898
(d) (5 pts) What are the control signal values for RegWrite (d1),MemtoReg(dz),MemRead(d3), and MemWrite (d4) for the sub instruction?
#428899
(1) A processor with higher MIPS (Million Instruction per Second) has higher performance than a processor with lower MIPS.
#428900
相關試卷
110年 - 110 國立臺灣大學_碩士班招生考試_部分系所:計算機結構與作業系統(B)#102077
110年 · #102077
109年 - 109 國立臺灣大學_碩士班招生考試_資訊工程學研究所:計算機結構與作業系統(B)#106045
109年 · #106045
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